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| author | Richard Biener <rguenther@suse.de> | 2019-09-26 16:54:51 +0000 |
|---|---|---|
| committer | Richard Biener <rguenth@gcc.gnu.org> | 2019-09-26 16:54:51 +0000 |
| commit | 0bfc204142439b8167bf3447d7d12b65d1da82f8 (patch) | |
| tree | a2335246e4ea0ed0bd0ecd9fb508bcd581749c5f /gcc | |
| parent | 1b4dbccc1f828fa00e6acc8b88d24301c65552df (diff) | |
| download | gcc-0bfc204142439b8167bf3447d7d12b65d1da82f8.zip gcc-0bfc204142439b8167bf3447d7d12b65d1da82f8.tar.gz gcc-0bfc204142439b8167bf3447d7d12b65d1da82f8.tar.bz2 | |
re PR tree-optimization/91896 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1687)
2019-09-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/91896
* tree-vect-loop.c (vectorizable_reduction): The single
def-use cycle optimization cannot apply when there's more
than one pattern stmt involved.
* gcc.dg/torture/pr91896.c: New testcase.
From-SVN: r276158
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/expr.c | 13 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr91897.c | 12 |
4 files changed, 31 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 66d7d86..1358d4b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-09-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/91896 + * tree-vect-loop.c (vectorizable_reduction): The single + def-use cycle optimization cannot apply when there's more + than one pattern stmt involved. + 2019-09-26 Richard Biener <rguenther@suse.de> * tree-vect-loop.c (vect_analyze_loop_operations): Analyze @@ -7230,12 +7230,13 @@ get_inner_reference (tree exp, poly_int64_pod *pbitsize, *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp)) || TYPE_UNSIGNED (TREE_TYPE (exp))); - /* For vector types, with the correct size of access, use the mode of - inner type. */ - if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE - && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) - && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) - mode = TYPE_MODE (TREE_TYPE (exp)); + /* For vector element types with the correct size of access or for + vector typed accesses use the mode of the access type. */ + if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE + && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) + && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) + || VECTOR_TYPE_P (TREE_TYPE (exp))) + mode = TYPE_MODE (TREE_TYPE (exp)); } else { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8d75c29..19ad393 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-09-26 Richard Biener <rguenther@suse.de> + + PR middle-end/91897 + * gcc.target/i386/pr91897.c: New testcase. + 2019-09-26 Martin Sebor <msebor@redhat.com> PR tree-optimization/91914 diff --git a/gcc/testsuite/gcc.target/i386/pr91897.c b/gcc/testsuite/gcc.target/i386/pr91897.c new file mode 100644 index 0000000..0615ad2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr91897.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx" } */ + +typedef double Double16 __attribute__((vector_size(8*16))); + +void mult(Double16 *res, const Double16 *v1, const Double16 *v2) +{ + *res = *v1 * *v2; +} + +/* We want 4 ymm loads and 4 ymm stores. */ +/* { dg-final { scan-assembler-times "movapd" 8 } } */ |