s390.c (s390_preferred_reload_class): Do not force constants to the pool unless necessary.

	* config/s390/s390.c (s390_preferred_reload_class): Do not
	force constants to the pool unless necessary.
	(s390_decompose_address): Prefer to use pointer as base,
	not index register.
	* config/s390/s390.md ("*tsthiCCT_only"): Remove '?' from
	Q alternative.
	("*movdi_64", "*movsi", "movhi", "movqi_64", "movqi",
	"*movdf_64", "*movsf"): Add '?' to Q->Q alternatives.
	("*extractqi", "*extracthi", "*zero_extendhisi2_31",
	"*zero_extendqisi2_31", "*zero_extendqihi2_31",
	"*adddi3_31", "*subdi3_31"): Do not set "type" attribute.

From-SVN: r64583

3 files changed, 57 insertions, 43 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 29a35b8..5a0fd43 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2003-03-18  Ulrich Weigand  <uweigand@de.ibm.com>
+
+	* config/s390/s390.c (s390_preferred_reload_class): Do not
+	force constants to the pool unless necessary.
+	(s390_decompose_address): Prefer to use pointer as base,
+	not index register.
+	* config/s390/s390.md ("*tsthiCCT_only"): Remove '?' from
+	Q alternative.
+	("*movdi_64", "*movsi", "movhi", "movqi_64", "movqi", 
+	"*movdf_64", "*movsf"): Add '?' to Q->Q alternatives.
+	("*extractqi", "*extracthi", "*zero_extendhisi2_31",
+	"*zero_extendqisi2_31", "*zero_extendqihi2_31",
+	"*adddi3_31", "*subdi3_31"): Do not set "type" attribute.
+
 Wed Mar 19 11:28:45 CET 2003  Jan Hubicka  <jh@suse.cz>
 
 	* i386.h (machine_function): New fields use_fast_prologue_epilogue.
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 13e4bf5..0e5d0f6 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -1674,23 +1674,14 @@ s390_preferred_reload_class (op, class)
   switch (GET_CODE (op))
     {
       /* Constants we cannot reload must be forced into the
-	 literal pool.  For constants we *could* handle directly,
-	 it might still be preferable to put them in the pool and
-	 use a memory-to-memory instruction.
-
-	 However, try to avoid needlessly allocating a literal
-	 pool in a routine that wouldn't otherwise need any.
-	 Heuristically, we assume that 64-bit leaf functions
-	 typically don't need a literal pool, all others do.  */
+	 literal pool.  */
+
       case CONST_DOUBLE:
       case CONST_INT:
-	if (!legitimate_reload_constant_p (op))
-	  return NO_REGS;
-
-	if (TARGET_64BIT && current_function_is_leaf)
+	if (legitimate_reload_constant_p (op))
 	  return class;
-
-	return NO_REGS;
+	else
+	  return NO_REGS;
 
       /* If a symbolic constant or a PLUS is reloaded,
 	 it is most likely being used as an address, so
@@ -1879,6 +1870,22 @@ s390_decompose_address (addr, out)
     disp = addr;		/* displacement */
 
 
+  /* Prefer to use pointer as base, not index.  */
+  if (base && indx)
+    {
+      int base_ptr = GET_CODE (base) == UNSPEC
+		     || (REG_P (base) && REG_POINTER (base));
+      int indx_ptr = GET_CODE (indx) == UNSPEC
+		     || (REG_P (indx) && REG_POINTER (indx));
+
+      if (!base_ptr && indx_ptr)
+	{
+	  rtx tmp = base;
+	  base = indx;
+	  indx = tmp;
+	}
+    }
+
   /* Validate base register.  */
   if (base)
     {
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 7ebf1c7..370dceb 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -608,7 +608,7 @@
 
 (define_insn "*tsthiCCT_cconly"
   [(set (reg 33)
-        (compare (match_operand:HI 0 "nonimmediate_operand" "?Q,d")
+        (compare (match_operand:HI 0 "nonimmediate_operand" "Q,d")
                  (match_operand:HI 1 "const0_operand" "")))
    (clobber (match_scratch:HI 2 "=d,X"))]
   "s390_match_ccmode(insn, CCTmode)"
@@ -1028,8 +1028,8 @@
     (set_attr "type"    "larl")])
 
 (define_insn "*movdi_64"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,Q")
-        (match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f,Q"))]
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,?Q")
+        (match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f,?Q"))]
   "TARGET_64BIT"
   "@
    lgr\\t%0,%1
@@ -1187,8 +1187,8 @@
   [(set_attr "op_type" "RI")])
 
 (define_insn "*movsi"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,Q")
-        (match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f,Q"))]
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,?Q")
+        (match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f,?Q"))]
   ""
   "@
    lr\\t%0,%1
@@ -1217,8 +1217,8 @@
 ;
 
 (define_insn "movhi"
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m,Q")
-        (match_operand:HI 1 "general_operand" "d,n,m,d,Q"))]
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m,?Q")
+        (match_operand:HI 1 "general_operand" "d,n,m,d,?Q"))]
   ""
   "@
    lr\\t%0,%1
@@ -1244,8 +1244,8 @@
 ;
 
 (define_insn "movqi_64"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,Q")
-        (match_operand:QI 1 "general_operand" "d,n,m,d,n,Q"))]
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,?Q")
+        (match_operand:QI 1 "general_operand" "d,n,m,d,n,?Q"))]
   "TARGET_64BIT"
   "@
    lr\\t%0,%1
@@ -1258,8 +1258,8 @@
    (set_attr "type" "lr,*,*,store,store,cs")])
 
 (define_insn "movqi"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,Q")
-        (match_operand:QI 1 "general_operand" "d,n,m,d,n,Q"))]
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,?Q")
+        (match_operand:QI 1 "general_operand" "d,n,m,d,n,?Q"))]
   ""
   "@
    lr\\t%0,%1
@@ -1338,8 +1338,8 @@
 }")
 
 (define_insn "*movdf_64"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m,Q")
-        (match_operand:DF 1 "general_operand" "f,m,f,d,m,d,Q"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m,?Q")
+        (match_operand:DF 1 "general_operand" "f,m,f,d,m,d,?Q"))]
   "TARGET_64BIT"
   "@
    ldr\\t%0,%1
@@ -1438,8 +1438,8 @@
 }")
 
 (define_insn "*movsf"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m,Q")
-        (match_operand:SF 1 "general_operand" "f,m,f,d,m,d,Q"))]
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m,?Q")
+        (match_operand:SF 1 "general_operand" "f,m,f,d,m,d,?Q"))]
   ""
   "@
    ler\\t%0,%1
@@ -2086,8 +2086,7 @@
   operands[2] = GEN_INT (32 - INTVAL (operands[2]));
   operands[1] = change_address (operands[1], QImode, 0);
 }"
-  [(set_attr "type"    "o2")
-   (set_attr "atype"   "agen")])
+  [(set_attr "atype"   "agen")])
 
 (define_insn_and_split "*extracthi"
   [(set (match_operand:SI 0 "register_operand" "=d")
@@ -2108,8 +2107,7 @@
   operands[2] = GEN_INT (32 - INTVAL (operands[2]));
   operands[1] = change_address (operands[1], HImode, 0);
 }"
-  [(set_attr "type"    "o2")
-   (set_attr "atype"   "agen")])
+  [(set_attr "atype"   "agen")])
 
 ;
 ; extendsidi2 instruction pattern(s).
@@ -2404,8 +2402,7 @@
     [(set (strict_low_part (match_dup 2)) (match_dup 1))
      (clobber (reg:CC 33))])]
   "operands[2] = gen_lowpart (HImode, operands[0]);"
-  [(set_attr "type" "o2")
-   (set_attr "atype" "agen")])
+  [(set_attr "atype" "agen")])
  
 ;
 ; zero_extendqisi2 instruction pattern(s).
@@ -2439,8 +2436,7 @@
   [(set (match_dup 0) (const_int 0))
    (set (strict_low_part (match_dup 2)) (match_dup 1))]
   "operands[2] = gen_lowpart (QImode, operands[0]);"
-  [(set_attr "type" "o2")
-   (set_attr "atype" "agen")])
+  [(set_attr "atype" "agen")])
  
 ;
 ; zero_extendqihi2 instruction pattern(s).
@@ -2474,8 +2470,7 @@
   [(set (match_dup 0) (const_int 0))
    (set (strict_low_part (match_dup 2)) (match_dup 1))]
   "operands[2] = gen_lowpart (QImode, operands[0]);"
-  [(set_attr "type" "o2")
-   (set_attr "atype" "agen")])
+  [(set_attr "atype" "agen")])
 
 
 ;
@@ -3067,8 +3062,7 @@
    operands[7] = operand_subword (operands[1], 1, 1, DImode);
    operands[8] = operand_subword (operands[2], 1, 1, DImode);
    operands[9] = gen_label_rtx ();"
-  [(set_attr "op_type"  "NN")
-   (set_attr "type"     "o3")])
+  [(set_attr "op_type"  "NN")])
 
 (define_expand "adddi3"
   [(parallel
@@ -3532,8 +3526,7 @@
    operands[7] = operand_subword (operands[1], 1, 1, DImode);
    operands[8] = operand_subword (operands[2], 1, 1, DImode);
    operands[9] = gen_label_rtx ();"
-  [(set_attr "op_type"  "NN")
-   (set_attr "type"     "o3")])
+  [(set_attr "op_type"  "NN")])
 
 (define_expand "subdi3"
   [(parallel