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authorUros Bizjak <uros@gcc.gnu.org>2014-10-17 08:00:58 +0200
committerUros Bizjak <uros@gcc.gnu.org>2014-10-17 08:00:58 +0200
commit021478683cc091de9902d297a7b161f8343ffb6a (patch)
treeb404567433f66e5efbdf52b2c5b60ac1234314e4 /gcc
parent5fcffe51f0feba3b795e6668582c63760db8389a (diff)
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cpuid.h (__cpuid): Remove definitions that handle %ebx register in a special way.
* config/i386/cpuid.h (__cpuid): Remove definitions that handle %ebx register in a special way. (__cpuid_count): Ditto. * config/i386/driver-i386.h: Protect with "#if defined(__GNUC__) && (__GNUC__ >= 5 || !defined(__PIC__))". (host_detect_local_cpu): Mention that GCC with non-fixed %ebx is required to compile the function. From-SVN: r216362
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/i386/cpuid.h51
-rw-r--r--gcc/config/i386/driver-i386.c8
2 files changed, 5 insertions, 54 deletions
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index a191bd4..133e356 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -146,55 +146,6 @@
#define signature_VORTEX_ecx 0x436f5320
#define signature_VORTEX_edx 0x36387865
-#if defined(__i386__) && defined(__PIC__)
-/* %ebx may be the PIC register. */
-#if __GNUC__ >= 3
-#define __cpuid(level, a, b, c, d) \
- __asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \
- "cpuid\n\t" \
- "xchg{l}\t{%%}ebx, %k1\n\t" \
- : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
- : "0" (level))
-
-#define __cpuid_count(level, count, a, b, c, d) \
- __asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \
- "cpuid\n\t" \
- "xchg{l}\t{%%}ebx, %k1\n\t" \
- : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
- : "0" (level), "2" (count))
-#else
-/* Host GCCs older than 3.0 weren't supporting Intel asm syntax
- nor alternatives in i386 code. */
-#define __cpuid(level, a, b, c, d) \
- __asm__ ("xchgl\t%%ebx, %k1\n\t" \
- "cpuid\n\t" \
- "xchgl\t%%ebx, %k1\n\t" \
- : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
- : "0" (level))
-
-#define __cpuid_count(level, count, a, b, c, d) \
- __asm__ ("xchgl\t%%ebx, %k1\n\t" \
- "cpuid\n\t" \
- "xchgl\t%%ebx, %k1\n\t" \
- : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
- : "0" (level), "2" (count))
-#endif
-#elif defined(__x86_64__) && (defined(__code_model_medium__) || defined(__code_model_large__)) && defined(__PIC__)
-/* %rbx may be the PIC register. */
-#define __cpuid(level, a, b, c, d) \
- __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
- "cpuid\n\t" \
- "xchg{q}\t{%%}rbx, %q1\n\t" \
- : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
- : "0" (level))
-
-#define __cpuid_count(level, count, a, b, c, d) \
- __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
- "cpuid\n\t" \
- "xchg{q}\t{%%}rbx, %q1\n\t" \
- : "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
- : "0" (level), "2" (count))
-#else
#define __cpuid(level, a, b, c, d) \
__asm__ ("cpuid\n\t" \
: "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
@@ -204,7 +155,7 @@
__asm__ ("cpuid\n\t" \
: "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
: "0" (level), "2" (count))
-#endif
+
/* Return highest supported input value for cpuid instruction. ext can
be either 0x0 or 0x8000000 to return highest supported value for
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 4d6bf83..c913113 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -24,7 +24,7 @@ along with GCC; see the file COPYING3. If not see
const char *host_detect_local_cpu (int argc, const char **argv);
-#ifdef __GNUC__
+#if defined(__GNUC__) && (__GNUC__ >= 5 || !defined(__PIC__))
#include "cpuid.h"
struct cache_desc
@@ -942,9 +942,9 @@ done:
}
#else
-/* If we aren't compiling with GCC then the driver will just ignore
- -march and -mtune "native" target and will leave to the newly
- built compiler to generate code for its default target. */
+/* If we are compiling with GCC where %EBX register is fixed, then the
+ driver will just ignore -march and -mtune "native" target and will leave
+ to the newly built compiler to generate code for its default target. */
const char *host_detect_local_cpu (int, const char **)
{