diff options
author | Stephane Carrez <Stephane.Carrez@worldnet.fr> | 2001-07-20 21:43:19 +0200 |
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committer | Stephane Carrez <ciceron@gcc.gnu.org> | 2001-07-20 21:43:19 +0200 |
commit | 00d0458c03fc77ca4d52412d47b23a09106e3696 (patch) | |
tree | 20da3a6c69f1acd78c0d9a9f358a4b17371f1281 /gcc | |
parent | d74e9142ac9b840a314530dc25d91df22f9170db (diff) | |
download | gcc-00d0458c03fc77ca4d52412d47b23a09106e3696.zip gcc-00d0458c03fc77ca4d52412d47b23a09106e3696.tar.gz gcc-00d0458c03fc77ca4d52412d47b23a09106e3696.tar.bz2 |
m68hc11.md ("movdi", [...]): Use an expand to emit the pattern; put a REG_INC note for push/pop instructions.
* config/m68hc11/m68hc11.md ("movdi", "movdi_internal"): Use an
expand to emit the pattern; put a REG_INC note for push/pop
instructions.
("movdf", "movdf_internal"): Likewise.
("movsi", "movsi_internal"): Likewise.
("movsf", "movsf_internal"): Likewise.
("movhi", "movqi"): Emit a REG_INC note for push/pop instructions.
From-SVN: r44208
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/m68hc11/m68hc11.md | 117 |
2 files changed, 122 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f19c5f8..b73cd66 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,15 @@ 2001-07-20 Stephane Carrez <Stephane.Carrez@worldnet.fr> + * config/m68hc11/m68hc11.md ("movdi", "movdi_internal"): Use an + expand to emit the pattern; put a REG_INC note for push/pop + instructions. + ("movdf", "movdf_internal"): Likewise. + ("movsi", "movsi_internal"): Likewise. + ("movsf", "movsf_internal"): Likewise. + ("movhi", "movqi"): Emit a REG_INC note for push/pop instructions. + +2001-07-20 Stephane Carrez <Stephane.Carrez@worldnet.fr> + * config/m68hc11/m68hc11.c (m68hc11_gen_highpart): Don't use gen_highpart. diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index f599204..e75f1ad 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -587,7 +587,28 @@ ;; The insn will be split in one or several memory moves (movw). ;; [SCz: this does not work ?? So, I switched temporary to 'd' reg] ;;-------------------------------------------------------------------- -(define_insn "movdi" +(define_expand "movdi" + [(parallel [(set (match_operand:DI 0 "nonimmediate_operand" "") + (match_operand:DI 1 "general_operand" "")) + (clobber (match_scratch:HI 2 ""))])] + "" + " + /* For push/pop, emit a REG_INC note to make sure the reload + inheritance and reload CSE pass notice the change of the stack + pointer. */ + if (IS_STACK_PUSH (operands[0]) || IS_STACK_POP (operands[1])) + { + rtx insn; + + insn = emit_insn (gen_movdi_internal (operands[0], operands[1])); + REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, + stack_pointer_rtx, + REG_NOTES (insn)); + DONE; + } +") + +(define_insn "movdi_internal" [(set (match_operand:DI 0 "nonimmediate_operand" "=U,!u,U,m,m,!u") (match_operand:DI 1 "general_operand" "iU,iU,!u,mi,!u,!mu")) (clobber (match_scratch:HI 2 "=&d,&d,&d,&d,&d,&d"))] @@ -603,7 +624,27 @@ "m68hc11_split_move (operands[0], operands[1], operands[2]); DONE;") -(define_insn "movdf" +(define_expand "movdf" + [(parallel [(set (match_operand:DF 0 "nonimmediate_operand" "") + (match_operand:DF 1 "general_operand" "")) + (clobber (match_scratch:HI 2 ""))])] + "" + "/* For push/pop, emit a REG_INC note to make sure the reload + inheritance and reload CSE pass notice the change of the stack + pointer. */ + if (IS_STACK_PUSH (operands[0]) || IS_STACK_POP (operands[1])) + { + rtx insn; + + insn = emit_insn (gen_movdf_internal (operands[0], operands[1])); + REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, + stack_pointer_rtx, + REG_NOTES (insn)); + DONE; + } +") + +(define_insn "movdf_internal" [(set (match_operand:DF 0 "nonimmediate_operand" "=U,!u,U,m,m,!u") (match_operand:DF 1 "general_operand" "iU,iU,!u,mi,!u,!mu")) (clobber (match_scratch:HI 2 "=&d,&d,&d,&d,&d,&d"))] @@ -618,7 +659,7 @@ [(const_int 0)] "m68hc11_split_move (operands[0], operands[1], operands[2]); DONE;") - + ;;-------------------------------------------------------------------- ;;- 32-bit Move Operations. ;; The movsi and movsf patterns are identical except for the mode. @@ -628,7 +669,27 @@ ;; pass does not give us a register that dies in the insn and is used ;; for input/output operands. ;;-------------------------------------------------------------------- -(define_insn "movsi" +(define_expand "movsi" + [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "") + (match_operand:SI 1 "general_operand" "")) + (clobber (match_scratch:HI 2 ""))])] + "" + "/* For push/pop, emit a REG_INC note to make sure the reload + inheritance and reload CSE pass notice the change of the stack + pointer. */ + if (IS_STACK_PUSH (operands[0]) || IS_STACK_POP (operands[1])) + { + rtx insn; + + insn = emit_insn (gen_movsi_internal (operands[0], operands[1])); + REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, + stack_pointer_rtx, + REG_NOTES (insn)); + DONE; + } +") + +(define_insn "movsi_internal" [(set (match_operand:SI 0 "nonimmediate_operand" "=mu,?D,m,?D,?u,?u,!u,D") (match_operand:SI 1 "general_operand" "imu,im,?D,!u,?D,mi,!u,!D")) (clobber (match_scratch:HI 2 "=&d,X,X,X,X,&d,&d,X"))] @@ -644,7 +705,27 @@ "m68hc11_split_move (operands[0], operands[1], operands[2]); DONE;") -(define_insn "movsf" +(define_expand "movsf" + [(parallel [(set (match_operand:SF 0 "nonimmediate_operand" "") + (match_operand:SF 1 "general_operand" "")) + (clobber (match_scratch:HI 2 ""))])] + "" + "/* For push/pop, emit a REG_INC note to make sure the reload + inheritance and reload CSE pass notice the change of the stack + pointer. */ + if (IS_STACK_PUSH (operands[0]) || IS_STACK_POP (operands[1])) + { + rtx insn; + + insn = emit_insn (gen_movsf_internal (operands[0], operands[1])); + REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, + stack_pointer_rtx, + REG_NOTES (insn)); + DONE; + } +") + +(define_insn "movsf_internal" [(set (match_operand:SF 0 "nonimmediate_operand" "=m,D,m,D,!u,!u,!u,D") (match_operand:SF 1 "general_operand" "im,im,D,!u,D,mi,!u,!D")) (clobber (match_scratch:HI 2 "=&d,X,X,X,X,&d,&d,X"))] @@ -739,6 +820,19 @@ operands[1] = force_reg (HImode, operands[1]); } } + /* For push/pop, emit a REG_INC note to make sure the reload + inheritance and reload CSE pass notice the change of the stack + pointer. */ + if (IS_STACK_PUSH (operands[0]) || IS_STACK_POP (operands[1])) + { + rtx insn; + + insn = emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, + stack_pointer_rtx, + REG_NOTES (insn)); + DONE; + } }") (define_insn "movhi_const0" @@ -866,6 +960,19 @@ operands[1] = force_reg (QImode, operands[1]); } } + /* For push/pop, emit a REG_INC note to make sure the reload + inheritance and reload CSE pass notice the change of the stack + pointer. */ + if (IS_STACK_PUSH (operands[0]) || IS_STACK_POP (operands[1])) + { + rtx insn; + + insn = emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, + stack_pointer_rtx, + REG_NOTES (insn)); + DONE; + } }") (define_insn "*movqi_68hc12" |