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| author | Pan Li <pan2.li@intel.com> | 2024-11-15 15:05:58 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2024-11-15 18:47:49 +0800 |
| commit | 9676da9fc26c9be62a1e862b29165177aa95120f (patch) | |
| tree | eab807c4d8b786bb8c3053a42b77f9fc3a3b5b12 /gcc/varasm.cc | |
| parent | e5050819808507cb8efb8ee36e835c6e1891bee9 (diff) | |
| download | gcc-9676da9fc26c9be62a1e862b29165177aa95120f.zip gcc-9676da9fc26c9be62a1e862b29165177aa95120f.tar.gz gcc-9676da9fc26c9be62a1e862b29165177aa95120f.tar.bz2 | |
RISC-V: Remove unnecessary option for scalar SAT_ADD testcase
After we create a isolated folder to hold all SAT scalar test,
we have fully control of what optimization options passing to
the testcase. Thus, it is better to remove the unnecessary
work around for flto option, as well as the -O3 option for
each cases. The riscv.exp will pass sorts of different optimization
options for each case.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_s_add-1-i16.c: Remove flto
dg-skip workaround and -O3 option.
* gcc.target/riscv/sat/sat_s_add-1-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-1-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-1-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-1-1.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-1.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-2-1.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-2.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-3-1.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-3.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-4.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-10.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-11.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-12.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-13.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-14.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-15.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-17.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-18.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-19.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-20.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-21.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-22.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-23.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-24.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-25.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-26.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-27.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-28.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-29.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-3.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-30.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-31.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-33.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-34.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-35.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-36.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-37.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-38.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-39.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-4.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-40.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-41.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-42.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-43.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-44.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-45.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-46.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-47.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-48.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-49.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-5.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-50.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-51.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-52.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-53.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-54.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-55.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-56.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-57.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-58.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-59.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-6.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-60.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-7.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm_type_check-9.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/varasm.cc')
0 files changed, 0 insertions, 0 deletions