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author | H.J. Lu <hjl.tools@gmail.com> | 2022-06-17 17:02:05 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2022-07-03 10:30:07 -0700 |
commit | f3a5e75cb66dc96efca7d494fe6060746c88acb1 (patch) | |
tree | 2a9e8a05756635c4a3243c4ac5078de4205880ec /gcc/value-range.h | |
parent | 3ae9def08565c36af2dc0bff495545ee1e9db642 (diff) | |
download | gcc-f3a5e75cb66dc96efca7d494fe6060746c88acb1.zip gcc-f3a5e75cb66dc96efca7d494fe6060746c88acb1.tar.gz gcc-f3a5e75cb66dc96efca7d494fe6060746c88acb1.tar.bz2 |
x86: Support 2/4/8 byte constant vector stores
1. Add a predicate for constant vectors which can be converted to integer
constants suitable for constant integer stores. For a 8-byte constant
vector, the converted 64-bit integer must be valid for store with 64-bit
immediate, which is a 64-bit integer sign-extended from a 32-bit integer.
2. Add a new pattern to allow 2-byte, 4-byte and 8-byte constant vector
stores, like
(set (mem:V2HI (reg:DI 84))
(const_vector:V2HI [(const_int 0 [0]) (const_int 1 [0x1])]))
3. After reload, convert constant vector stores to constant integer
stores, like
(set (mem:SI (reg:DI 5 di [84]))
(const_int 65536 [0x10000]))
For
void
foo (short * c)
{
c[0] = 0;
c[1] = 1;
}
it generates
movl $65536, (%rdi)
instead of
movl .LC0(%rip), %eax
movl %eax, (%rdi)
gcc/
PR target/106022
* config/i386/i386-protos.h (ix86_convert_const_vector_to_integer):
New.
* config/i386/i386.cc (ix86_convert_const_vector_to_integer):
New.
* config/i386/mmx.md (V_16_32_64): New.
(*mov<mode>_imm): New patterns for stores with 16-bit, 32-bit
and 64-bit constant vector.
* config/i386/predicates.md (x86_64_const_vector_operand): New.
gcc/testsuite/
PR target/106022
* gcc.target/i386/pr106022-1.c: New test.
* gcc.target/i386/pr106022-2.c: Likewise.
* gcc.target/i386/pr106022-3.c: Likewise.
* gcc.target/i386/pr106022-4.c: Likewise.
Diffstat (limited to 'gcc/value-range.h')
0 files changed, 0 insertions, 0 deletions