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| author | Jonathan Wright <jonathan.wright@arm.com> | 2021-02-16 15:42:36 +0000 |
|---|---|---|
| committer | Jonathan Wright <jonathan.wright@arm.com> | 2021-04-30 18:40:54 +0100 |
| commit | b0d9aac8992c1f8c3198d9528a9867c653623dfb (patch) | |
| tree | a21188d7f21698def6fac111aafce95ccfcf3c57 /gcc/value-range.h | |
| parent | 60518e6473248b16db9125504da0351707c35d1a (diff) | |
| download | gcc-b0d9aac8992c1f8c3198d9528a9867c653623dfb.zip gcc-b0d9aac8992c1f8c3198d9528a9867c653623dfb.tar.gz gcc-b0d9aac8992c1f8c3198d9528a9867c653623dfb.tar.bz2 | |
aarch64: Use RTL builtins for FP ml[as] intrinsics
Rewrite floating-point vml[as][q] Neon intrinsics to use RTL builtins
rather than relying on the GCC vector extensions. Using RTL builtins
allows control over the emission of fmla/fmls instructions (which we
don't want here.)
With this commit, the code generated by these intrinsics changes from
a fused multiply-add/subtract instruction to an fmul followed by an
fadd/fsub instruction. If the programmer really wants fmla/fmls
instructions, they can use the vfm[as] intrinsics.
gcc/ChangeLog:
2021-02-16 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Add float_ml[as]
builtin generator macros.
* config/aarch64/aarch64-simd.md (aarch64_float_mla<mode>):
Define.
(aarch64_float_mls<mode>): Define.
* config/aarch64/arm_neon.h (vmla_f32): Use RTL builtin
instead of relying on GCC vector extensions.
(vmla_f64): Likewise.
(vmlaq_f32): Likewise.
(vmlaq_f64): Likewise.
(vmls_f32): Likewise.
(vmls_f64): Likewise.
(vmlsq_f32): Likewise.
(vmlsq_f64): Likewise.
* config/aarch64/iterators.md: Define VDQF_DF mode iterator.
Diffstat (limited to 'gcc/value-range.h')
0 files changed, 0 insertions, 0 deletions