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| author | Pan Li <pan2.li@intel.com> | 2023-04-27 11:31:42 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-04-27 23:01:45 +0800 |
| commit | e0cf929d99bebd9a740db6db45d69957514e0c12 (patch) | |
| tree | d1a158850b119da78847e97dc33747605deaf51d /gcc/value-range.h | |
| parent | 82f4f90a3761848ac71cee4fc607483572c0b34b (diff) | |
| download | gcc-e0cf929d99bebd9a740db6db45d69957514e0c12.zip gcc-e0cf929d99bebd9a740db6db45d69957514e0c12.tar.gz gcc-e0cf929d99bebd9a740db6db45d69957514e0c12.tar.bz2 | |
RISC-V: Add required tls to read thread pointer test
The read-thread-pointer test may require the gcc configured
with --enable-tls. If no, there x4 (aka tp) register will not
be presented in the assembly code.
This patch requires the tls for the dg checking. It will perform
the test checking if --enable-tls and mark the test as unsupported
if --disable-tls.
Configured with --enable-tls:
=== gcc Summary ===
of expected passes 16
Configured with --disable-tls:
=== gcc Summary ===
of unsupported tests 8
gcc/testsuite/ChangeLog:
* gcc.target/riscv/read-thread-pointer.c: Add required tls.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/value-range.h')
0 files changed, 0 insertions, 0 deletions