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author | Richard Biener <rguenther@suse.de> | 2023-08-21 14:09:48 +0200 |
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committer | Richard Biener <rguenther@suse.de> | 2023-08-21 15:10:06 +0200 |
commit | 2eaebcf3df4dba0bfa379b7adde455710e9b3e41 (patch) | |
tree | 70d1cee3060c03f25f4adc695f69ec4fb099d412 /gcc/value-range.cc | |
parent | e4e6a92407432cc19db73f8ce108243007d614f0 (diff) | |
download | gcc-2eaebcf3df4dba0bfa379b7adde455710e9b3e41.zip gcc-2eaebcf3df4dba0bfa379b7adde455710e9b3e41.tar.gz gcc-2eaebcf3df4dba0bfa379b7adde455710e9b3e41.tar.bz2 |
Fix FAIL: gcc.target/i386/pr87007-5.c
The following fixes the gcc.target/i386/pr87007-5.c testcase which
changed code generation again after the recent sinking improvements.
We now have
vxorps %xmm0, %xmm0, %xmm0
vsqrtsd d2(%rip), %xmm0, %xmm0
and a necessary xor again in one case, the other vsqrtsd has
a register source and a properly zeroing load:
vmovsd d3(%rip), %xmm0
testl %esi, %esi
jg .L11
.L3:
vsqrtsd %xmm0, %xmm0, %xmm0
the following patch adjusts the scan.
* gcc.target/i386/pr87007-5.c: Update comment, adjust subtest.
Diffstat (limited to 'gcc/value-range.cc')
0 files changed, 0 insertions, 0 deletions