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| author | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2022-10-11 15:50:11 +0200 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2022-11-18 21:15:24 +0100 |
| commit | acbb5ef06ee97849ecd5412ab56c1dff0f0d2fcf (patch) | |
| tree | 58f171c628c42a4bea78af23ae988faabe0bf90b /gcc/tree.cc | |
| parent | 23d9f62c50d935462ecda5516746037a474c25cd (diff) | |
| download | gcc-acbb5ef06ee97849ecd5412ab56c1dff0f0d2fcf.zip gcc-acbb5ef06ee97849ecd5412ab56c1dff0f0d2fcf.tar.gz gcc-acbb5ef06ee97849ecd5412ab56c1dff0f0d2fcf.tar.bz2 | |
RISC-V: Optimize branches testing a bit-range or a shifted immediate
gcc/ChangeLog:
* config/riscv/predicates.md (shifted_const_arith_operand): New predicate.
(uimm_extra_bit_operand): New predicate.
* config/riscv/riscv.md (*branch<ANYI:mode>_shiftedarith_equals_zero):
New pattern.
(*branch<ANYI:mode>_shiftedmask_equals_zero): New pattern.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/branch-1.c: New test.
Diffstat (limited to 'gcc/tree.cc')
0 files changed, 0 insertions, 0 deletions