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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2019-11-07 10:49:06 +0000
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>2019-11-07 10:49:06 +0000
commit65dd610dcbcf5e1a952f341d0a441593bebe200f (patch)
treef9325cafb9706e72c4560efda43a4fcabb90a689 /gcc/tree.c
parent16155ccf588a403c033ccd7743329671bcfb27d5 (diff)
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[arm][5/X] Implement Q-bit-setting SIMD32 intrinsics
This patch implements some more Q-setting intrinsics of the multiply-accumulate variety, but these are in the SIMD32 family in that they treat their operands as packed SIMD values, but that's not important at the RTL level. * config/arm/arm.md (arm_<simd32_op><add_clobber_q_name>_insn): New define_insns. (arm_<simd32_op>): New define_expands. * config/arm/arm_acle.h (__smlad, __smladx, __smlsd, __smlsdx, __smuad, __smuadx): Define. * config/arm/arm_acle_builtins.def: Define builtins for the above. * config/arm/iterators.md (SIMD32_TERNOP_Q): New int_iterator. (SIMD32_BINOP_Q): Likewise. (simd32_op): Handle the above. * config/arm/unspecs.md: Define unspecs for the above. * gcc.target/arm/acle/simd32.c: Update test. From-SVN: r277918
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