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| author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-11-07 08:53:42 +0000 |
|---|---|---|
| committer | Chenghua Xu <paulhua@gcc.gnu.org> | 2018-11-07 08:53:42 +0000 |
| commit | 659ce7cb2924c4dc9938c3f6f0b8705a21903bd9 (patch) | |
| tree | 6ed1fc1447d4d681337545e20de06843ae81f1e8 /gcc/tree.c | |
| parent | 2b94a36d5da43bbcc494f7d25f0c379069a85d9b (diff) | |
| download | gcc-659ce7cb2924c4dc9938c3f6f0b8705a21903bd9.zip gcc-659ce7cb2924c4dc9938c3f6f0b8705a21903bd9.tar.gz gcc-659ce7cb2924c4dc9938c3f6f0b8705a21903bd9.tar.bz2 | |
Add support for Loongson 3A2000/3A3000 processor.
gcc/
* config/mips/gs464e.md: New.
* config/mips/mips-cpus.def: Define gs464e.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.c (mips_rtx_cost_data): Add DEFAULT_COSTS for
gs464e.
(mips_issue_rate): Add support for gs464e.
(mips_multipass_dfa_lookahead): Likewise.
(mips_option_override): Enable MMI, EXT and EXT2 for gs464e.
* config/mips/mips.h: Define TARGET_GS464E and TUNE_GS464E.
(MIPS_ISA_LEVEL_SPEC): Infer mips64r2 from gs464e.
(ISA_HAS_FUSED_MADD4): Enable for TARGET_GS464E.
(ISA_HAS_UNFUSED_MADD4): Exclude TARGET_GS464E.
* config/mips/mips.md: Include gs464e.md.
(processor): Add gs464e.
* doc/invoke.texi: Add gs464e to supported architectures.
From-SVN: r265866
Diffstat (limited to 'gcc/tree.c')
0 files changed, 0 insertions, 0 deletions