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| author | Ilya Leoshkevich <iii@linux.ibm.com> | 2018-11-16 11:47:47 +0000 |
|---|---|---|
| committer | Ilya Leoshkevich <iii@gcc.gnu.org> | 2018-11-16 11:47:47 +0000 |
| commit | b978975256b9186e27f7c626f67a5e5bddb10e33 (patch) | |
| tree | 25400d1fbe22803be77a0fdcae181213b7471cd0 /gcc/tree-vrp.c | |
| parent | 43c6ad435bcb037b426545696c5a657994f2fecf (diff) | |
| download | gcc-b978975256b9186e27f7c626f67a5e5bddb10e33.zip gcc-b978975256b9186e27f7c626f67a5e5bddb10e33.tar.gz gcc-b978975256b9186e27f7c626f67a5e5bddb10e33.tar.bz2 | |
S/390: Add a new pattern for r{o,x}sbg
Fixes rXsbg_mode_sXl test failures.
Combine used to give us
(set (reg:SI 65)
(ior:SI (lshiftrt:SI (reg:SI 3 %r3 [ bD.2238 ])
(const_int 2 [0x2]))
(reg:SI 2 %r2 [ aD.2237 ])))
but now we get
(set (reg:SI 65)
(ior:SI (subreg:SI (zero_extract:DI (reg:DI 69)
(const_int 32 [0x20])
(const_int 30 [0x1e])) 4)
(subreg:SI (reg:DI 68) 4)))
or
(set (reg:SI 65)
(ior:SI (subreg:SI (and:DI (lshiftrt:DI (reg:DI 69)
(const_int 2 [0x2]))
(const_int 4294967295 [0xffffffff])) 4)
(subreg:SI (reg:DI 68) 4)))
with an extra subreg, which appears because pseudos, unlike hard
registers, can be accessed only using their natural mode.
This patch adds a special case for that. Also, it performs r*sbg
bit index computations during gcc run, so that expectations do not
depend on which concrete pattern was matched.
gcc/ChangeLog:
2018-11-16 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390.md
(*r<noxa>sbg_<mode>_srl_bitmask): Do not delegate arithmetic to
assembler.
(*r<noxa>sbg_<mode>_sll): Likewise.
(*r<noxa>sbg_<mode>_srl): Likewise.
(*r<noxa>sbg_sidi_srl): New pattern.
gcc/testsuite/ChangeLog:
2018-11-16 Ilya Leoshkevich <iii@linux.ibm.com>
* gcc.target/s390/md/rXsbg_mode_sXl.c: Do not use arithmetic in
r{o,x}sbg expectations.
* gcc.target/s390/risbg-ll-2.c: Likewise.
From-SVN: r266203
Diffstat (limited to 'gcc/tree-vrp.c')
0 files changed, 0 insertions, 0 deletions