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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2014-04-02 17:03:49 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2014-04-02 17:03:49 +0000 |
| commit | 690c229f467233ded7028f6be3775cf119451b68 (patch) | |
| tree | adc558ad63fb094a6801b55ad237732881f3f0bf /gcc/tree-vectorizer.h | |
| parent | 7b59ff2d552e6aa8f923f45459bf98c5adc5cf66 (diff) | |
| download | gcc-690c229f467233ded7028f6be3775cf119451b68.zip gcc-690c229f467233ded7028f6be3775cf119451b68.tar.gz gcc-690c229f467233ded7028f6be3775cf119451b68.tar.bz2 | |
re PR target/60735 (GCC targeting E500 with SPE has errors with the _Decimal64 type)
2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
software floating point or no floating point registers, do not
allow any type in the FPRs. Eliminate a test for SPE SIMD types
in GPRs that occurs after we tested for GPRs that would never be
true.
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,
specifically allow DDmode, since that does not use the SPE SIMD
instructions.
From-SVN: r209025
Diffstat (limited to 'gcc/tree-vectorizer.h')
0 files changed, 0 insertions, 0 deletions