diff options
author | David Faust <david.faust@oracle.com> | 2023-08-15 10:54:17 -0700 |
---|---|---|
committer | David Faust <david.faust@oracle.com> | 2023-08-15 11:25:43 -0700 |
commit | 489e1adf7792985b21195c740da7370f96b19640 (patch) | |
tree | 22856e9b93ab801cd912f452b4e2eee43da6d13b /gcc/tree-vectorizer.h | |
parent | d073e2d75d9ed492de9a8dc6970e5b69fae20e5a (diff) | |
download | gcc-489e1adf7792985b21195c740da7370f96b19640.zip gcc-489e1adf7792985b21195c740da7370f96b19640.tar.gz gcc-489e1adf7792985b21195c740da7370f96b19640.tar.bz2 |
bpf: fix pseudoc w regs for small modes [PR111029]
In the BPF pseudo-c assembly dialect, registers treated as 32-bits
rather than the full 64 in various instructions ought to be printed as
"wN" rather than "rN". But bpf_print_register () was only doing this
for specifically SImode registers, meaning smaller modes were printed
incorrectly.
This caused assembler errors like:
Error: unrecognized instruction `w2 =(s8)r1'
for a 32-bit sign-extending register move instruction, where the source
register is used in QImode.
Fix bpf_print_register () to print the "w" version of register when
specified by the template for any mode 32-bits or smaller.
PR target/111029
gcc/
* config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
for any mode 32-bits or smaller, not just SImode.
gcc/testsuite/
* gcc.target/bpf/smov-2.c: New test.
* gcc.target/bpf/smov-pseudoc-2.c: New test.
Diffstat (limited to 'gcc/tree-vectorizer.h')
0 files changed, 0 insertions, 0 deletions