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authorPan Li <pan2.li@intel.com>2024-10-12 10:40:30 +0800
committerPan Li <pan2.li@intel.com>2024-10-14 15:23:22 +0800
commitb97629226d9be496bc30bb13608ef1c2bcdceeb7 (patch)
treefaedafefabb8e95e78b0d76527bb33db8eee7bcb /gcc/tree-vectorizer.h
parent5920bc841492e04b2bd06426db8620784b263d8d (diff)
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RISC-V: Add testcases for form 3 of vector signed SAT_SUB
Form 3: #define DEF_VEC_SAT_S_SUB_FMT_3(T, UT, MIN, MAX) \ void __attribute__((noinline)) \ vec_sat_s_sub_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \ { \ unsigned i; \ for (i = 0; i < limit; i++) \ { \ T x = op_1[i]; \ T y = op_2[i]; \ T minus; \ bool overflow = __builtin_sub_overflow (x, y, &minus); \ out[i] = overflow ? x < 0 ? MIN : MAX : minus; \ } \ } The below test are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i16.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i32.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i64.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i8.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i16.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i32.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i64.c: New test. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i8.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
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