RISC-V: Use widening shift for scatter/gather if applicable.

With the zvbb extension we can emit a widening shift for scatter/gather
index preparation in case we need to multiply by 2 and zero extend.

The patch also adds vwsll to the mode_idx attribute and removes the
mode from shift-count operand of the insn pattern.

gcc/ChangeLog:

	* config/riscv/riscv-v.cc (expand_gather_scatter): Use vwsll if
	applicable.
	* config/riscv/vector-crypto.md: Remove mode from vwsll shift
	count operator.
	* config/riscv/vector.md: Add vwsll to mode iterator.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp: Add zvbb.
	* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12-zvbb.c: New test.

0 files changed, 0 insertions, 0 deletions