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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-11-10 07:33:25 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-11-10 09:08:13 +0800 |
| commit | 1fa7dde8d680f28ed66db47309ed5e8f2789054d (patch) | |
| tree | ebc037c7e8ca0b8c20578acc5a62715442d472b6 /gcc/tree-vect-loop.cc | |
| parent | 907603d4b117e82dbbde2d58a04e33f3021908e7 (diff) | |
| download | gcc-1fa7dde8d680f28ed66db47309ed5e8f2789054d.zip gcc-1fa7dde8d680f28ed66db47309ed5e8f2789054d.tar.gz gcc-1fa7dde8d680f28ed66db47309ed5e8f2789054d.tar.bz2 | |
RISC-V: Move cond_copysign from combine pattern to autovec pattern
Since cond_copysign has been support into match.pd (middle-end).
We don't need to support conditional copysign by RTL combine pass.
Instead, we can support it by direct explicit cond_copysign optab.
conditional copysign tests are already available in the testsuite.
No need to add tests.
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
* config/riscv/autovec.md (cond_copysign<mode>): New pattern.
Diffstat (limited to 'gcc/tree-vect-loop.cc')
0 files changed, 0 insertions, 0 deletions