RISC-V: Add testcases for scalar unsigned SAT_ADD form 1

After the middle-end support the form 1 of unsigned SAT_ADD and
the RISC-V backend implement the scalar .SAT_ADD, add more test
case to cover the form 1 of unsigned .SAT_ADD.

Form 1:

  #define SAT_ADD_U_1(T)                   \
  T sat_add_u_1_##T(T x, T y)              \
  {                                        \
    return (T)(x + y) >= x ? (x + y) : -1; \
  }

Passed the riscv fully regression tests.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add helper macro for form 1.
	* gcc.target/riscv/sat_u_add-5.c: New test.
	* gcc.target/riscv/sat_u_add-6.c: New test.
	* gcc.target/riscv/sat_u_add-7.c: New test.
	* gcc.target/riscv/sat_u_add-8.c: New test.
	* gcc.target/riscv/sat_u_add-run-5.c: New test.
	* gcc.target/riscv/sat_u_add-run-6.c: New test.
	* gcc.target/riscv/sat_u_add-run-7.c: New test.
	* gcc.target/riscv/sat_u_add-run-8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

0 files changed, 0 insertions, 0 deletions