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| author | Pengxuan Zheng <quic_pzheng@quicinc.com> | 2024-05-30 17:53:23 -0700 |
|---|---|---|
| committer | Pengxuan Zheng <quic_pzheng@quicinc.com> | 2024-06-06 11:50:13 -0700 |
| commit | 230d62a2cdd16c1ec8fe87998ec01081503f010d (patch) | |
| tree | 12b4c0a45717f9228f79715635fb2f4301793c26 /gcc/tree-vect-loop.cc | |
| parent | 30ce9dfcc665b6088e5898cfa766b57556ebb90e (diff) | |
| download | gcc-230d62a2cdd16c1ec8fe87998ec01081503f010d.zip gcc-230d62a2cdd16c1ec8fe87998ec01081503f010d.tar.gz gcc-230d62a2cdd16c1ec8fe87998ec01081503f010d.tar.bz2 | |
aarch64: Add vector floating point extend pattern [PR113880, PR113869]
This patch adds vector floating point extend pattern for V2SF->V2DF and
V4HF->V4SF conversions by renaming the existing aarch64_float_extend_lo_<Vwide>
pattern to the standard optab one, i.e., extend<mode><Vwide>2. This allows the
vectorizer to vectorize certain floating point widening operations for the
aarch64 target.
PR target/113880
PR target/113869
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc (VAR1): Remap float_extend_lo_
builtin codes to standard optab ones.
* config/aarch64/aarch64-simd.md (aarch64_float_extend_lo_<Vwide>): Rename
to...
(extend<mode><Vwide>2): ... This.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/extend-vec.c: New test.
Signed-off-by: Pengxuan Zheng <quic_pzheng@quicinc.com>
Diffstat (limited to 'gcc/tree-vect-loop.cc')
0 files changed, 0 insertions, 0 deletions