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| author | Lyut Nersisyan <lyut.nersisyan@gmail.com> | 2024-05-26 21:24:40 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2024-05-26 21:25:31 -0600 |
| commit | 160929406f0c44df5b0d377a014ebfe5027fe4e7 (patch) | |
| tree | 6b7e75ad9d57c3439457c8d55df030f0e19916e0 /gcc/tree-vect-loop.cc | |
| parent | 0022064649d0ec40e97df24279c48842e278fedc (diff) | |
| download | gcc-160929406f0c44df5b0d377a014ebfe5027fe4e7.zip gcc-160929406f0c44df5b0d377a014ebfe5027fe4e7.tar.gz gcc-160929406f0c44df5b0d377a014ebfe5027fe4e7.tar.bz2 | |
[to-be-committed][RISC-V] Reassociate constants in logical ops
This patch from Lyut will reassociate operands when we have shifted logical
operations. This can simplify a constant that may not be fit in a simm12 into
a form that does fit into a simm12.
The basic work was done by Lyut. I generalized it to handle XOR/OR.
It stands on its own, but also helps the upcoming Zbkb work from Lyut.
This has survived Ventana's CI system as well as my tester. Obviously I'll
wait for a verdict from the Rivos CI system before moving forward.
gcc/
* config/riscv/riscv.md (<optab>_shift_reverse<X:mode>): New pattern.
gcc/testsuite
* gcc.target/riscv/and-shift32.c: New test.
* gcc.target/riscv/and-shift64.c: New test.
Co-authored-by: Jeffrey A Law <jlaw@ventanamicro.com>
Diffstat (limited to 'gcc/tree-vect-loop.cc')
0 files changed, 0 insertions, 0 deletions