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| author | Matthieu Longo <matthieu.longo@arm.com> | 2024-01-29 15:54:35 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2024-01-29 15:54:35 +0000 |
| commit | bad991a1c5960e90c4686a9362a1258ef29e195b (patch) | |
| tree | d58e685022253266bb41aa0d61a5fc27efbb5987 /gcc/tree-vect-loop-manip.cc | |
| parent | 0f7945417f913c85bd556904c0c4e7bf77793488 (diff) | |
| download | gcc-bad991a1c5960e90c4686a9362a1258ef29e195b.zip gcc-bad991a1c5960e90c4686a9362a1258ef29e195b.tar.gz gcc-bad991a1c5960e90c4686a9362a1258ef29e195b.tar.bz2 | |
arm: Add pattern for bswap + rotate -> rev16 [Bug 108933]
The rev16 pattern was not recognised anymore as a change in the bswap
tree pass was introducing a new GIMPLE form, not recognized by the
assembly final transformation pass.
Also, fix the output patterns for arm_rev16si_alt[12] to correctly
handle the instructions being made conditional.
More details in the PR.
gcc/ChangeLog:
PR target/108933
* config/arm/arm.md (arm_rev16si2): Convert to define_insn.
Correct generated RTL.
(arm_rev16si2_alt1): Correctly handle conditional execution.
(arm_rev16si2_alt2): Likewise.
gcc/testsuite/ChangeLog:
PR target/108933
* gcc.target/arm/rev16.c: Moved to...
* gcc.target/arm/rev16_1.c: ...here.
* gcc.target/arm/rev16_2.c: New test to check that rev16 is emitted.
Diffstat (limited to 'gcc/tree-vect-loop-manip.cc')
0 files changed, 0 insertions, 0 deletions