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| author | Georg-Johann Lay <avr@gjlay.de> | 2023-06-02 12:41:07 +0200 |
|---|---|---|
| committer | Georg-Johann Lay <avr@gjlay.de> | 2023-06-02 12:41:07 +0200 |
| commit | 7bf89a919fdab9e18b7ad3efaa1a79f1d7520ddf (patch) | |
| tree | e948e3c8f91ffd91a43540be5c4a29e3bacc34ff /gcc/tree-vect-loop-manip.cc | |
| parent | 4d866c6bb4569988dbf322473f7c6857640c71b2 (diff) | |
| download | gcc-7bf89a919fdab9e18b7ad3efaa1a79f1d7520ddf.zip gcc-7bf89a919fdab9e18b7ad3efaa1a79f1d7520ddf.tar.gz gcc-7bf89a919fdab9e18b7ad3efaa1a79f1d7520ddf.tar.bz2 | |
target/110088: Improve operation of l-reg with const after move from d-reg.
After reload, there may be sequences like
lreg = dreg
lreg = lreg <op> const
with an LD_REGS dreg, non-LD_REGS lreg, and <op> in PLUS, IOR, AND.
If dreg dies after the first insn, it is possible to use
dreg = dreg <op> const
lreg = dreg
instead which is more efficient.
gcc/
PR target/110088
* config/avr/avr.md: Add an RTL peephole to optimize operations on
non-LD_REGS after a move from LD_REGS.
(piaop): New code iterator.
Diffstat (limited to 'gcc/tree-vect-loop-manip.cc')
0 files changed, 0 insertions, 0 deletions