LoongArch: Implement FCCmode reload and cstore<ANYF:mode>4

We used a branch to load floating-point comparison results into GPR.
This is very slow when the branch is not predictable.

Implement movfcc so we can reload FCCmode into GPRs, FPRs, and MEM.
Then implement cstore<ANYF:mode>4.

gcc/ChangeLog:

	* config/loongarch/loongarch-tune.h
	(loongarch_rtx_cost_data::movcf2gr): New field.
	(loongarch_rtx_cost_data::movcf2gr_): New method.
	(loongarch_rtx_cost_data::use_movcf2gr): New method.
	* config/loongarch/loongarch-def.cc
	(loongarch_rtx_cost_data::loongarch_rtx_cost_data): Set movcf2gr
	to COSTS_N_INSNS (7) and movgr2cf to COSTS_N_INSNS (15), based
	on timing on LA464.
	(loongarch_cpu_rtx_cost_data): Set movcf2gr and movgr2cf to
	COSTS_N_INSNS (1) for LA664.
	(loongarch_rtx_cost_optimize_size): Set movcf2gr and movgr2cf to
	COSTS_N_INSNS (1) + 1.
	* config/loongarch/predicates.md (loongarch_fcmp_operator): New
	predicate.
	* config/loongarch/loongarch.md (movfcc): Change to
	define_expand.
	(movfcc_internal): New define_insn.
	(fcc_to_<X:mode>): New define_insn.
	(cstore<ANYF:mode>4): New define_expand.
	* config/loongarch/loongarch.cc
	(loongarch_hard_regno_mode_ok_uncached): Allow FCCmode in GPRs
	and GPRs.
	(loongarch_secondary_reload): Reload FCCmode via FPR and/or GPR.
	(loongarch_emit_float_compare): Call gen_reg_rtx instead of
	loongarch_allocate_fcc.
	(loongarch_allocate_fcc): Remove.
	(loongarch_move_to_gpr_cost): Handle FCC_REGS -> GR_REGS.
	(loongarch_move_from_gpr_cost): Handle GR_REGS -> FCC_REGS.
	(loongarch_register_move_cost): Handle FCC_REGS -> FCC_REGS,
	FCC_REGS -> FP_REGS, and FP_REGS -> FCC_REGS.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/movcf2gr.c: New test.
	* gcc.target/loongarch/movcf2gr-via-fr.c: New test.

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