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| author | Lehua Ding <lehua.ding@rivai.ai> | 2023-06-09 07:27:01 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2023-06-09 07:29:14 -0600 |
| commit | 45b7da5f4951c3e9e5187487d611d16ff8cf148f (patch) | |
| tree | 743056acf657970c6d83fa4fa6597b44feb437aa /gcc/tree-vect-loop-manip.cc | |
| parent | 00da6bcfccbc5ab13821d8dd7334dd48c22d5702 (diff) | |
| download | gcc-45b7da5f4951c3e9e5187487d611d16ff8cf148f.zip gcc-45b7da5f4951c3e9e5187487d611d16ff8cf148f.tar.gz gcc-45b7da5f4951c3e9e5187487d611d16ff8cf148f.tar.bz2 | |
testsuite: fix the condition bug in tsvc s176
This patch fixes the problem that the loop in the tsvc s176 function is
optimized and removed because `iterations/LEN_1D` is 0 (where iterations
is set to 10000, LEN_1D is set to 32000 in tsvc.h).
This testcase passed on x86 and AArch64 system.
Best,
Lehua
gcc/testsuite/ChangeLog:
* gcc.dg/vect/tsvc/vect-tsvc-s176.c: Adjust iterations.
* gcc.dg/vect/tsvc/tsvc.h: Adjust expected rsult for s176.
Diffstat (limited to 'gcc/tree-vect-loop-manip.cc')
0 files changed, 0 insertions, 0 deletions