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| author | Eric Botcazou <ebotcazou@adacore.com> | 2016-11-11 22:38:33 +0000 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2016-11-11 22:38:33 +0000 |
| commit | 8b287aea3561278b4002864c0d1c29b769493448 (patch) | |
| tree | d0c42b5c68c9cac41892a474b5a2eeccd1791ba7 /gcc/tree-vect-loop-manip.c | |
| parent | 84971f1bade1acb6b721260fb02f3740642c643e (diff) | |
| download | gcc-8b287aea3561278b4002864c0d1c29b769493448.zip gcc-8b287aea3561278b4002864c0d1c29b769493448.tar.gz gcc-8b287aea3561278b4002864c0d1c29b769493448.tar.bz2 | |
re PR rtl-optimization/59461 (missed zero-extension elimination in the combiner)
PR rtl-optimization/59461
* doc/rtl.texi (paradoxical subregs): Add missing word.
* combine.c (reg_nonzero_bits_for_combine): Do not discard results
in modes with precision larger than that of last_set_mode.
* rtlanal.c (nonzero_bits1) <SUBREG>: If WORD_REGISTER_OPERATIONS is
set and LOAD_EXTEND_OP is appropriate, propagate results from inner
REGs to paradoxical SUBREGs.
(num_sign_bit_copies1) <SUBREG>: Likewise. Check that the mode is not
larger than a word before invoking LOAD_EXTEND_OP on it.
From-SVN: r242326
Diffstat (limited to 'gcc/tree-vect-loop-manip.c')
0 files changed, 0 insertions, 0 deletions