diff options
| author | Jim Wilson <jimw@sifive.com> | 2018-06-30 21:52:01 +0000 |
|---|---|---|
| committer | Jim Wilson <wilson@gcc.gnu.org> | 2018-06-30 14:52:01 -0700 |
| commit | 666fdc46bc848984ee7d2906f2dfe10e1ee5d535 (patch) | |
| tree | dfcba939f1bcd8dc96d335edf960ac2bf2c767a9 /gcc/tree-ssa-threadupdate.c | |
| parent | 3330053ecaafe8bca82cc3845be9b2d01a614eb1 (diff) | |
| download | gcc-666fdc46bc848984ee7d2906f2dfe10e1ee5d535.zip gcc-666fdc46bc848984ee7d2906f2dfe10e1ee5d535.tar.gz gcc-666fdc46bc848984ee7d2906f2dfe10e1ee5d535.tar.bz2 | |
RISC-V: Add patterns to convert AND mask to two shifts.
gcc/
* config/riscv/predicates.md (p2m1_shift_operand): New.
(high_mask_shift_operand): New.
* config/riscv/riscv.md (lshrsi3_zero_extend_3+1): New combiner
pattern using p2m1_shift_operand.
(lshsi3_zero_extend_3+2): New combiner pattern using
high_mask_shift_operand.
gcc/testsuite/
* gcc.target/riscv/shift-shift-1.c: New.
* gcc.target/riscv/shift-shift-2.c: New.
* gcc.target/riscv/shift-shift-3.c: New.
From-SVN: r262278
Diffstat (limited to 'gcc/tree-ssa-threadupdate.c')
0 files changed, 0 insertions, 0 deletions