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| author | Richard Earnshaw <rearnsha@arm.com> | 2021-09-03 16:53:13 +0100 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2021-09-13 11:26:48 +0100 |
| commit | f0cfd070b68772eaaa19a3b711fbd9e85b244240 (patch) | |
| tree | 05f3449d545f645847aa73b935be4b66dba4d68d /gcc/tree-ssa-threadedge.c | |
| parent | 408e8b906632f215f6652b8851bba612cde07c25 (diff) | |
| download | gcc-f0cfd070b68772eaaa19a3b711fbd9e85b244240.zip gcc-f0cfd070b68772eaaa19a3b711fbd9e85b244240.tar.gz gcc-f0cfd070b68772eaaa19a3b711fbd9e85b244240.tar.bz2 | |
arm: expand handling of movmisalign for DImode [PR102125]
DImode is currently handled only for machines with vector modes
enabled, but this is unduly restrictive and is generally better done
in core registers.
gcc/ChangeLog:
PR target/102125
* config/arm/arm.md (movmisaligndi): New define_expand.
* config/arm/vec-common.md (movmisalign<mode>): Iterate over VDQ mode.
Diffstat (limited to 'gcc/tree-ssa-threadedge.c')
0 files changed, 0 insertions, 0 deletions