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| author | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2016-10-27 10:19:27 +0000 |
|---|---|---|
| committer | Thomas Preud'homme <thopre01@gcc.gnu.org> | 2016-10-27 10:19:27 +0000 |
| commit | ddb92ab95f6ba681423ba55db9910821735544c1 (patch) | |
| tree | dc19465bb22dad76890b8479bf1e991d20871f24 /gcc/tree-ssa-threadedge.c | |
| parent | 33cab74617734fdda5b39bd645d13361cd92af23 (diff) | |
| download | gcc-ddb92ab95f6ba681423ba55db9910821735544c1.zip gcc-ddb92ab95f6ba681423ba55db9910821735544c1.tar.gz gcc-ddb92ab95f6ba681423ba55db9910821735544c1.tar.bz2 | |
Enable ARMv8-M atomic and synchronization support for ARMv8-M Baseline
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.h (TARGET_HAVE_LDREX): Define for ARMv8-M Baseline.
(TARGET_HAVE_LDREXBH): Likewise.
(TARGET_HAVE_LDACQ): Likewise.
gcc/testsuite/
* gcc.target/arm/atomic-comp-swap-release-acquire-3.c: New test.
* gcc.target/arm/atomic-op-acq_rel-3.c: Likewise.
* gcc.target/arm/atomic-op-acquire-3.c: Likewise.
* gcc.target/arm/atomic-op-char-3.c: Likewise.
* gcc.target/arm/atomic-op-consume-3.c: Likewise.
* gcc.target/arm/atomic-op-int-3.c: Likewise.
* gcc.target/arm/atomic-op-relaxed-3.c: Likewise.
* gcc.target/arm/atomic-op-release-3.c: Likewise.
* gcc.target/arm/atomic-op-seq_cst-3.c: Likewise.
* gcc.target/arm/atomic-op-short-3.c: Likewise.
From-SVN: r241615
Diffstat (limited to 'gcc/tree-ssa-threadedge.c')
0 files changed, 0 insertions, 0 deletions