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author | Richard Earnshaw <rearnsha@arm.com> | 2021-09-03 17:06:15 +0100 |
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committer | Richard Earnshaw <rearnsha@arm.com> | 2021-09-13 11:26:48 +0100 |
commit | 5f6a6c91d7c592cb49f7c519f289777eac09bb74 (patch) | |
tree | 63b2e89f201b605fd70aa9f92c00c1e693a30599 /gcc/tree-ssa-threadedge.c | |
parent | f0cfd070b68772eaaa19a3b711fbd9e85b244240 (diff) | |
download | gcc-5f6a6c91d7c592cb49f7c519f289777eac09bb74.zip gcc-5f6a6c91d7c592cb49f7c519f289777eac09bb74.tar.gz gcc-5f6a6c91d7c592cb49f7c519f289777eac09bb74.tar.bz2 |
gimple: allow more folding of memcpy [PR102125]
The current restriction on folding memcpy to a single element of size
MOVE_MAX is excessively cautious on most machines and limits some
significant further optimizations. So relax the restriction provided
the copy size does not exceed MOVE_MAX * MOVE_RATIO and that a SET
insn exists for moving the value into machine registers.
Note that there were already checks in place for having misaligned
move operations when one or more of the operands were unaligned.
On Arm this now permits optimizing
uint64_t bar64(const uint8_t *rData1)
{
uint64_t buffer;
memcpy(&buffer, rData1, sizeof(buffer));
return buffer;
}
from
ldr r2, [r0] @ unaligned
sub sp, sp, #8
ldr r3, [r0, #4] @ unaligned
strd r2, [sp]
ldrd r0, [sp]
add sp, sp, #8
to
mov r3, r0
ldr r0, [r0] @ unaligned
ldr r1, [r3, #4] @ unaligned
PR target/102125 - (ARM Cortex-M3 and newer) missed optimization. memcpy not needed operations
gcc/ChangeLog:
PR target/102125
* gimple-fold.c (gimple_fold_builtin_memory_op): Allow folding
memcpy if the size is not more than MOVE_MAX * MOVE_RATIO.
Diffstat (limited to 'gcc/tree-ssa-threadedge.c')
0 files changed, 0 insertions, 0 deletions