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author | Richard Earnshaw <rearnsha@arm.com> | 2016-12-15 15:52:42 +0000 |
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committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2016-12-15 15:52:42 +0000 |
commit | 3d7f68c6d99dedb9c00f7fc97156815bf6acaf50 (patch) | |
tree | 38aa03ba52e49d6c891954ae3700846fbdd41358 /gcc/tree-ssa-threadbackward.h | |
parent | 9e9219f327f8b9bc2ebce28296e46698def176f1 (diff) | |
download | gcc-3d7f68c6d99dedb9c00f7fc97156815bf6acaf50.zip gcc-3d7f68c6d99dedb9c00f7fc97156815bf6acaf50.tar.gz gcc-3d7f68c6d99dedb9c00f7fc97156815bf6acaf50.tar.bz2 |
[arm] Eliminate vfp_reg_type
Remove the VFP_REGS field by converting its meanings into flag
attributes. The new flag attributes build on each other describing
increasing capabilities. This allows us to do a better job when
inlining functions with differing requiremetns on the fpu environment:
we can now inline A into B if B has at least the same register set
properties as B (previously we required identical register set
properties).
* arm.h (vfp_reg_type): Delete.
(TARGET_FPU_REGS): Delete.
(arm_fpu_desc): Delete regs field.
(FPU_FL_NONE, FPU_FL_NEON, FPU_FL_FP16, FPU_FL_CRYPTO): Use unsigned
values.
(FPU_FL_DBL, FPU_FL_D32): Define.
(TARGET_VFPD32): Use feature test.
(TARGET_VFP_SINGLE): Likewise.
(TARGET_VFP_DOUBLE): Likewise.
* arm-fpus.def: Update all entries for new feature bits.
* arm.c (all_fpus): Update initializer macro.
(arm_can_inline_p): Remove test on fpu regs.
From-SVN: r243707
Diffstat (limited to 'gcc/tree-ssa-threadbackward.h')
0 files changed, 0 insertions, 0 deletions