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| author | Richard Earnshaw <rearnsha@arm.com> | 2016-12-15 15:54:53 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2016-12-15 15:54:53 +0000 |
| commit | 066416dabcdc6da2596da2c19a9876218c634435 (patch) | |
| tree | d569d01e12b38f32edf957d26a8f5915986f23bb /gcc/tree-ssa-threadbackward.h | |
| parent | c17c0c7a524d2b1eb96cf0edc8a72299fea7b252 (diff) | |
| download | gcc-066416dabcdc6da2596da2c19a9876218c634435.zip gcc-066416dabcdc6da2596da2c19a9876218c634435.tar.gz gcc-066416dabcdc6da2596da2c19a9876218c634435.tar.bz2 | |
[arm] Add isa features to FPU descriptions
Similar to the new CPU and architecture ISA feature lists, we now add
similar capabilities to each FPU description. We don't use these yet,
that will come in later patches. These follow the same style as the
newly modified flag sets, but use slightly different defaults that
more accurately reflect the ISA specifications.
* arm-isa.h (isa_feature): Add bits for VFPv4, FPv5, fp16conv,
fP_dbl, fp_d32 and fp_crypto.
(ISA_ALL_FPU): Add all the new bits.
(ISA_VFPv2, ISA_VFPv3, ISA_VFPv4, ISA_FPv5): New macros.
(ISA_FP_ARMv8, ISA_FP_DBL, ISA_FP_D32, ISA_NEON, ISA_CRYPTO): Likewise.
* arm-fpus.def: Add ISA features to all FPUs.
* arm.h: (arm_fpu_desc): Add new field for ISA bits.
* arm.c (all_fpus): Initialize it.
* arm-tables.opt: Regenerated.
From-SVN: r243709
Diffstat (limited to 'gcc/tree-ssa-threadbackward.h')
0 files changed, 0 insertions, 0 deletions