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| author | Xionghu Luo <luoxhu@linux.ibm.com> | 2021-10-28 21:28:43 -0500 |
|---|---|---|
| committer | Xionghu Luo <luoxhu@linux.ibm.com> | 2021-10-28 21:28:43 -0500 |
| commit | 146b83e14a0a76a9ce8a4cb79997a078f437f779 (patch) | |
| tree | c465e9f9a5451b51fcd5422aad53319c9e60fb2e /gcc/tree-ssa-threadbackward.c | |
| parent | 84bcefd5555af6d95e08cd980965098961289215 (diff) | |
| download | gcc-146b83e14a0a76a9ce8a4cb79997a078f437f779.zip gcc-146b83e14a0a76a9ce8a4cb79997a078f437f779.tar.gz gcc-146b83e14a0a76a9ce8a4cb79997a078f437f779.tar.bz2 | |
rs6000: Optimize __builtin_shuffle when it's used to zero the upper bits [PR102868]
If the second operand of __builtin_shuffle is const vector 0, and with
specific mask, it can be optimized to vspltisw+xxpermdi instead of lxv.
gcc/ChangeLog:
PR target/102868
* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Add
patterns match and emit for VSX xxpermdi.
gcc/testsuite/ChangeLog:
PR target/102868
* gcc.target/powerpc/pr102868.c: New test.
Diffstat (limited to 'gcc/tree-ssa-threadbackward.c')
0 files changed, 0 insertions, 0 deletions