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| author | Richard Biener <rguenther@suse.de> | 2022-05-09 11:33:44 +0200 |
|---|---|---|
| committer | Richard Biener <rguenther@suse.de> | 2022-05-09 13:42:36 +0200 |
| commit | faabc751d0bb7e7fe86abfe8991b0307d585874a (patch) | |
| tree | cc97e4343aa2d8b777866139a6854a2f0ab9d306 /gcc/tree-ssa-sccvn.cc | |
| parent | 93416de0cb72358b95a96fa4341b7b93a6805842 (diff) | |
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tree-optimization/105517 - avoid offset truncation during VN
When value-numbering an address expression like
&p_74(D)->a1x[4294967295].a1; we are accumulating the byte offset
in an 64bit integer. When later exploiting the duality between
that and a POINTER_PLUS_EXPR we should avoid truncating that
offset to fit in the target specific sizetype. While such
overflows are generally undefined behavior, exploiting this
may leads to spurious missing diagnostics.
2022-05-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/105517
* tree-ssa-sccvn.cc (vn_reference_lookup): Make sure the accumulated
offset can be represented in the POINTER_PLUS_EXPR IL.
(vn_reference_insert): Likewise.
* poly-int.h (sext_hwi): Add poly version of sext_hwi.
Diffstat (limited to 'gcc/tree-ssa-sccvn.cc')
| -rw-r--r-- | gcc/tree-ssa-sccvn.cc | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc index 7658763..3732d06 100644 --- a/gcc/tree-ssa-sccvn.cc +++ b/gcc/tree-ssa-sccvn.cc @@ -3684,7 +3684,12 @@ vn_reference_lookup (tree op, tree vuse, vn_lookup_kind kind, break; off += vro->off; } - if (i == operands.length () - 1) + if (i == operands.length () - 1 + /* Make sure we the offset we accumulated in a 64bit int + fits the address computation carried out in target + offset precision. */ + && (off.coeffs[0] + == sext_hwi (off.coeffs[0], TYPE_PRECISION (sizetype)))) { gcc_assert (operands[i-1].opcode == MEM_REF); tree ops[2]; @@ -3808,7 +3813,12 @@ vn_reference_insert (tree op, tree result, tree vuse, tree vdef) break; off += vro->off; } - if (i == operands.length () - 1) + if (i == operands.length () - 1 + /* Make sure we the offset we accumulated in a 64bit int + fits the address computation carried out in target + offset precision. */ + && (off.coeffs[0] + == sext_hwi (off.coeffs[0], TYPE_PRECISION (sizetype)))) { gcc_assert (operands[i-1].opcode == MEM_REF); tree ops[2]; |