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author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-01-07 14:02:02 +0000 |
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committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-01-08 10:29:25 +0000 |
commit | c9d25aa7489fd478098e0ef098438e797d597d3b (patch) | |
tree | 1528daf7cbf593bba5f6952c23e0fad2511495aa /gcc/tree-ssa-sccvn.c | |
parent | 21c1a30fc73105af50c5e717cb99dc3becabf8fa (diff) | |
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aarch64: Fix RTL patterns for UABA/SABA
Sometime ago we changed the RTL representation of the (SU)ABD
instructions in RTL to a (MINUS (MAX) (MIN)) rather than a (MINUS (ABS) (ABS))
as it is more correctly models the semantics.
We should do the same for the accumulation forms of these instructions:
UABA/SABA.
This patch does that and allows the new pattern to generate the unsigned
UABA form as well.
The new form also allows it to more easily be re-used to implement the
relevant arm_neon.h intrinsics in the future.
The testcase takes an -fno-tree-reassoc to work around a side-effect of
PR98581.
gcc/
* config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
(aarch64_<su>aba<mode>): ... This. Handle uaba as well.
Change RTL pattern to match.
gcc/testsuite/
* gcc.target/aarch64/usaba_1.c: New test.
Diffstat (limited to 'gcc/tree-ssa-sccvn.c')
0 files changed, 0 insertions, 0 deletions