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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-03-29 11:52:24 +0100 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-03-29 11:54:57 +0100 |
| commit | 37d9074e12082132ae62c12fbe958c697f638c0a (patch) | |
| tree | c7102ff0938c1a2c1bc1bc005a7f5c2839f49fb2 /gcc/tree-ssa-sccvn.c | |
| parent | 25e515d2199d555848dfba01fd5364df94096496 (diff) | |
| download | gcc-37d9074e12082132ae62c12fbe958c697f638c0a.zip gcc-37d9074e12082132ae62c12fbe958c697f638c0a.tar.gz gcc-37d9074e12082132ae62c12fbe958c697f638c0a.tar.bz2 | |
aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns
This patch fixes the RTL representation of the move_lo_quad patterns to use aarch64_simd_or_scalar_imm_zero
for the zero part rather than a vec_duplicate of zero or a const_int 0.
The expander that generates them is also adjusted so that we use and match the correct const_vector forms throughout.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
gcc/ChangeLog:
PR target/99037
* config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Use
aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern
matching const_int 0.
(move_lo_quad_internal_be_<mode>): Likewise.
(move_lo_quad_<mode>): Update for the above.
* config/aarch64/iterators.md (VQ_2E): Delete.
gcc/testsuite/ChangeLog:
PR target/99808
* gcc.target/aarch64/pr99808.c: New test.
Diffstat (limited to 'gcc/tree-ssa-sccvn.c')
0 files changed, 0 insertions, 0 deletions