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authorRoman Zhuykov <zhroma@ispras.ru>2020-03-27 08:02:56 +0300
committerRoman Zhuykov <zhroma@ispras.ru>2020-03-27 08:02:56 +0300
commit06d5d63d9944691bb4286e5f6b2422cc97148336 (patch)
treebfa9ad03e474a6bd143e40add3388080049a765e /gcc/tree-ssa-propagate.c
parent71d69548a1b2c85220ac6354564fd272beb9263f (diff)
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modulo-sched: fix bootstrap compare-debug issue
This patch removes all debug insns from DDG analysis. It fixes bootstrap comparison failure on powerpc64le when running with -fmodulo-sched enabled. * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions. (create_ddg_dep_no_link): Likewise. (add_cross_iteration_register_deps): Move debug instruction check. Other minor refactoring. (add_intra_loop_mem_dep): Do not check for debug instructions. (add_inter_loop_mem_dep): Likewise. (build_intra_loop_deps): Likewise. (create_ddg): Do not include debug insns into the graph. * ddg.h (struct ddg): Remove num_debug field. * modulo-sched.c (doloop_register_get): Adjust condition. (res_MII): Remove DDG num_debug field usage. (sms_schedule_by_order): Use assertion against debug insns. (ps_has_conflicts): Drop debug insn check. testsuite: * gcc.c-torture/execute/pr70127-debug-sms.c: New test. * gcc.dg/torture/pr87197-debug-sms.c: New test.
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