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authorRoger Sayle <roger@nextmovesoftware.com>2020-08-06 09:15:25 +0100
committerRoger Sayle <roger@nextmovesoftware.com>2020-08-06 09:15:25 +0100
commitc072fd236dc08f990bfcffd98b27f211a39bb404 (patch)
tree5855e0bd9b0ccdbc47ea5adb68382d23da54abcc /gcc/tree-ssa-pre.c
parent85245bda63ab4cdad0a7cb0f94e06ad4b9a121d2 (diff)
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x86_64: Integer min/max improvements.
This patch tweaks the way that min and max are expanded, so that the semantics of these operations are visible to the early RTL optimization passes, until split into explicit comparison and conditional move instructions. The good news is that i386.md already contains all of the required logic (many thanks to Richard Biener and Uros Bizjak), but this is currently only enabled to scalar-to-vector (STV) synthesis of min/max instructions. This change enables this functionality for all TARGET_CMOVE architectures for SImode, HImode and DImode. 2020-08-06 Roger Sayle <roger@nextmovesoftware.com> Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog * config/i386/i386.md (MAXMIN_IMODE): No longer needed. (<maxmin><mode>3): Support SWI248 and general_operand for second operand, when TARGET_CMOVE. (<maxmin><mode>3_1 splitter): Optimize comparisons against 0, 1 and -1 to use "test" instead of "cmp". (*<maxmin>di3_doubleword): Likewise, allow general_operand and enable on TARGET_CMOVE. (peephole2): Convert clearing a register after a flag setting instruction into an xor followed by the original flag setter. gcc/testsuite/ChangeLog * gcc.target/i386/minmax-8.c: New test. * gcc.target/i386/minmax-9.c: New test. * gcc.target/i386/minmax-10.c: New test. * gcc.target/i386/minmax-11.c: New test.
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