RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS

This patch refactors the Phase 3 (Demand fusion) and rename it into Earliest fusion.
I do the refactor for the following reasons:

  1. Current implementation of phase 3 is doing too many things which makes the code quality
     quite messy and not easy to maintain.
  2. The demand fusion I do previously is we explicitly make the fusion including how to fuse
     VSETVLs, where to make the VSETVL fusion happens, check the VSETVL fusion point (location)
     whether it is correct and optimal...etc.

     We are dong these things too much so I added these following functions:

        enum fusion_type get_backward_fusion_type (const bb_info *,
					     const vector_insn_info &);
        bool hard_empty_block_p (const bb_info *, const vector_insn_info &) const;
        bool backward_demand_fusion (void);
        bool forward_demand_fusion (void);
        bool cleanup_illegal_dirty_blocks (void);

     to make sure the VSETV fusion is optimal and correct. I found in may downstream testing it is
     not the reliable and optimal approach.

     Instead, this patch is to use 'compute_earliest' which is the function of LCM to fuse multiple
     'compatible' VSETVL demand info if they are having same earliest edge.  We let LCM decide almost
     everything of demand fusion for us. The only thing we do (Not the LCM do) is just checking the
     VSETVLs demand info are compatible or not. That's all we need to do.
     I belive such approach is much more reliable and optimal than before (We have many testcases already to check this refactor patch).
  3. Using LCM approach to do the demand fusion is more reliable and better CFG than before.
  ...

Here is the basics of this patch approach:

Consider this following case:

for
  for
    for
      ...
         for
	   if (...)
	     VSETVL 1 demand: RATIO = 32 and TU policy.
	   else if (...)
	     VSETVL 2 demand: SEW = 16.
	   else
	     VSETVL 3 demand: MU policy.

   - 'compute_earliest' which output the earliest edge of VSETVL 1, VSETVL 2 and VSETVL 3.
     They are having same earliest edge which is outside the 1th inner-most loop.

   - Then, we check these 3 VSETVL demand info are compatible so fuse them into a single VSETVL info:
     demand SEW = 16, LMUL = MF2, TU, MU.

   - Then the later phase (phase 4) LCM PRE (partial reduandancy elimination) will hoist such VSETVL
     to the outer-most loop. So that we can get optimal codegen.

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
	New function.
	(after_or_same_p): Ditto.
	(find_reg_killed_by): Delete.
	(has_vsetvl_killed_avl_p): Ditto.
	(anticipatable_occurrence_p): Refactor.
	(any_set_in_bb_p): Delete.
	(count_regno_occurrences): Ditto.
	(backward_propagate_worthwhile_p): Ditto.
	(demands_can_be_fused_p): Ditto.
	(earliest_pred_can_be_fused_p): New function.
	(vsetvl_dominated_by_p): Ditto.
	(vector_insn_info::parse_insn): Refactor.
	(vector_insn_info::merge): Refactor.
	(vector_insn_info::dump): Refactor.
	(vector_infos_manager::vector_infos_manager): Refactor.
	(vector_infos_manager::all_empty_predecessor_p): Delete.
	(vector_infos_manager::all_same_avl_p): Ditto.
	(vector_infos_manager::create_bitmap_vectors): Refactor.
	(vector_infos_manager::free_bitmap_vectors): Refactor.
	(vector_infos_manager::dump): Refactor.
	(pass_vsetvl::update_block_info): New function.
	(enum fusion_type): Ditto.
	(pass_vsetvl::get_backward_fusion_type): Delete.
	(pass_vsetvl::hard_empty_block_p): Ditto.
	(pass_vsetvl::backward_demand_fusion): Ditto.
	(pass_vsetvl::forward_demand_fusion): Ditto.
	(pass_vsetvl::demand_fusion): Ditto.
	(pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
	(pass_vsetvl::compute_local_properties): Ditto.
	(pass_vsetvl::earliest_fusion): New function.
	(pass_vsetvl::vsetvl_fusion): Ditto.
	(pass_vsetvl::commit_vsetvls): Refactor.
	(get_first_vsetvl_before_rvv_insns): Ditto.
	(pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
	(pass_vsetvl::cleanup_earliest_vsetvls): New function.
	(pass_vsetvl::df_post_optimization): Refactor.
	(pass_vsetvl::lazy_vsetvl): Ditto.
	* config/riscv/riscv-vsetvl.h: Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: Adapt test.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-102.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-14.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-15.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-27.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-28.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-29.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-30.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-35.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-36.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-46.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-48.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-50.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-51.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-66.c:
	* gcc.target/riscv/rvv/vsetvl/avl_single-67.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-68.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-69.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-70.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-71.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-72.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-76.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-77.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-82.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-83.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-89.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-93.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-94.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-95.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-96.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/ffload-5.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-7.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-9.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-11.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-23.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/avl_single-103.c: New test.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c: New test.

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