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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-04-24 10:27:31 +0100 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-04-24 10:27:31 +0100 |
| commit | 9fd4a38c2f30b72ad5e3df7acb1ade201d8ac2cd (patch) | |
| tree | 3acb554bf5c905048945dfcdca8efd5f9afb0813 /gcc/tree-ssa-phiopt.cc | |
| parent | 636e2273aec555faa0a2f0e0b97b5f3355b25e47 (diff) | |
| download | gcc-9fd4a38c2f30b72ad5e3df7acb1ade201d8ac2cd.zip gcc-9fd4a38c2f30b72ad5e3df7acb1ade201d8ac2cd.tar.gz gcc-9fd4a38c2f30b72ad5e3df7acb1ade201d8ac2cd.tar.bz2 | |
aarch64: PR target/109406 Add support for SVE2 unpredicated MUL
SVE2 supports an unpredicated vector integer MUL form that we can emit from our SVE expanders
without using up a predicate registers. This patch does so.
As the SVE MUL expansion currently is templated away through a code iterator I did not split it
off just for this case but instead special-cased it in the define_expand. It seemed somewhat less
invasive than the alternatives but I could split it off more explicitly if others want to.
The div-by-bitmask_1.c testcase is adjusted to expect this new MUL form.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/ChangeLog:
PR target/109406
* config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
case.
* config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
pattern.
gcc/testsuite/ChangeLog:
PR target/109406
* gcc.target/aarch64/sve2/div-by-bitmask_1.c: Adjust for unpredicated SVE2
MUL.
* gcc.target/aarch64/sve2/unpred_mul_1.c: New test.
Diffstat (limited to 'gcc/tree-ssa-phiopt.cc')
0 files changed, 0 insertions, 0 deletions