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authorRoger Sayle <roger@nextmovesoftware.com>2023-04-23 10:30:30 +0100
committerRoger Sayle <roger@nextmovesoftware.com>2023-04-23 10:30:30 +0100
commit9a6e5b933fedd6a386c8bde7f93e3e0d4515030b (patch)
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[xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md
This patch adds a pair of define_insn patterns to the xstormy16 machine description that provide extendhisi2 and zero_extendhisi2, i.e. 16-bit to 32-bit sign- and zero-extension respectively. This functionality is already synthesized during RTL expansion, but providing patterns allow the semantics to be exposed to the RTL optimizers. To simplify things, this patch introduces a new %h0 output format, for emitting the high_part register name of a double-word (SImode) register pair. The actual code generated is identical to before. Whilst there, I also fixed the instruction lengths and formatting of the zero_extendqihi2 pattern. Then, mostly for documentation purposes as the 'T' constraint isn't yet implemented, I've added a "and Rx,#255" alternative to zero_extendqihi2 that takes advantage of its efficient instruction encoding. 2023-04-23 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h format specifier to output high_part register name of SImode reg. * config/stormy16/stormy16.md (extendhisi2): New define_insn. (zero_extendqihi2): Fix lengths, consistent formatting and add "and Rx,#255" alternative, for documentation purposes. (zero_extendhisi2): New define_insn. gcc/testsuite/ChangeLog * gcc.target/xstormy16/extendhisi2.c: New test case. * gcc.target/xstormy16/zextendhisi2.c: Likewise.
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