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author | Roger Sayle <roger@nextmovesoftware.com> | 2023-04-23 10:25:04 +0100 |
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committer | Roger Sayle <roger@nextmovesoftware.com> | 2023-04-23 10:25:04 +0100 |
commit | 987caaae343ec8277391c875549859f8a288fd81 (patch) | |
tree | a4530fccf777a79bb3725bf2acac988c6016c0b5 /gcc/tree-ssa-phiopt.cc | |
parent | 5830953a446959c5d8d9b569ffcd3e3bb16a06dc (diff) | |
download | gcc-987caaae343ec8277391c875549859f8a288fd81.zip gcc-987caaae343ec8277391c875549859f8a288fd81.tar.gz gcc-987caaae343ec8277391c875549859f8a288fd81.tar.bz2 |
[xstormy16] Improved SImode shifts by two bits.
Currently on xstormy16 SImode shifts by a single bit require two
instructions, and shifts by other non-zero integer immediate constants
require five instructions. This patch implements the obvious optimization
that shifts by two bits can be done in four instructions, by using two
single-bit sequences.
Hence, ashift_2 was previously generated as:
mov r7,r2 | shl r2,#2 | shl r3,#2 | shr r7,#14 | or r3,r7
ret
and with this patch we now generate:
shl r2,#1 | rlc r3,#1 | shl r2,#1 | rlc r3,#1
ret
2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
SImode shifts by two by performing a single bit SImode shift twice.
gcc/testsuite/ChangeLog
* gcc.target/xstormy16/shiftsi.c: New test case.
Diffstat (limited to 'gcc/tree-ssa-phiopt.cc')
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