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authorPan Li <pan2.li@intel.com>2023-08-10 16:00:17 +0800
committerPan Li <pan2.li@intel.com>2023-08-10 20:38:47 +0800
commit6176527a7528ec626fa1e7afb381124867881388 (patch)
tree084c95a38b086e536cc72eb5990e8e0c11d477a7 /gcc/tree-ssa-phiopt.cc
parent07e93224f5dceb3423f38a58c2a1923c200cd5c8 (diff)
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RISC-V: Support RVV VFNMACC rounding mode intrinsic API
This patch would like to support the rounding mode API for the VFNMACC for the below samples. * __riscv_vfnmacc_vv_f32m1_rm * __riscv_vfnmacc_vv_f32m1_rm_m * __riscv_vfnmacc_vf_f32m1_rm * __riscv_vfnmacc_vf_f32m1_rm_m Signed-off-by: Pan Li <pan2.li@intel.com> gcc/ChangeLog: * config/riscv/riscv-vector-builtins-bases.cc (class vfnmacc_frm): New class for vfnmacc. (vfnmacc_frm_obj): New declaration. (BASE): Ditto. * config/riscv/riscv-vector-builtins-bases.h: Ditto. * config/riscv/riscv-vector-builtins-functions.def (vfnmacc_frm): New function definition. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/float-point-nmacc.c: New test.
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