RISC-V: Support RVV VFWADD rounding mode intrinsic API

This patch would like to support the rounding mode API for the VFWADD
VFSUB and VFRSUB as below samples.

* __riscv_vfwadd_vv_f64m2_rm
* __riscv_vfwadd_vv_f64m2_rm_m
* __riscv_vfwadd_vf_f64m2_rm
* __riscv_vfwadd_vf_f64m2_rm_m
* __riscv_vfwadd_wv_f64m2_rm
* __riscv_vfwadd_wv_f64m2_rm_m
* __riscv_vfwadd_wf_f64m2_rm
* __riscv_vfwadd_wf_f64m2_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(class widen_binop_frm): New class for binop frm.
	(BASE): Add vfwadd_frm.
	* config/riscv/riscv-vector-builtins-bases.h: New declaration.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfwadd_frm): New function definition.
	* config/riscv/riscv-vector-builtins-shapes.cc
	(BASE_NAME_MAX_LEN): New macro.
	(struct alu_frm_def): Leverage new base class.
	(struct build_frm_base): New build base for frm.
	(struct widen_alu_frm_def): New struct for widen alu frm.
	(SHAPE): Add widen_alu_frm shape.
	* config/riscv/riscv-vector-builtins-shapes.h: New declaration.
	* config/riscv/vector.md (frm_mode): Add vfwalu type.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-widening-add.c: New test.

0 files changed, 0 insertions, 0 deletions