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| author | liuhongt <hongtao.liu@intel.com> | 2023-07-10 14:12:07 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2023-07-18 11:31:25 +0800 |
| commit | 06cc38c1c350b34cbd6dde23aefca32442c07a73 (patch) | |
| tree | d45959c82e53ea9daf252dd64816a9b6a25e5455 /gcc/tree-ssa-phiopt.cc | |
| parent | e6a1b23872995d5344a81cff1857bc861ffee71d (diff) | |
| download | gcc-06cc38c1c350b34cbd6dde23aefca32442c07a73.zip gcc-06cc38c1c350b34cbd6dde23aefca32442c07a73.tar.gz gcc-06cc38c1c350b34cbd6dde23aefca32442c07a73.tar.bz2 | |
Add peephole to eliminate redundant comparison after cmpccxadd.
Similar like we did for cmpxchg, but extended to all
ix86_comparison_int_operator since cmpccxadd set EFLAGS exactly same
as CMP.
When operand order in compare insn is same as that in cmpccxadd,
compare insn can be eliminated directly.
When operand order is swapped in compare insn, only optimize cmpccxadd
+ cmpl + jcc/setcc to cmpccxadd + jcc/setcc when FLAGS_REG is dead
after jcc/setcc.
gcc/ChangeLog:
PR target/110591
* config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
3 define_peephole2 after the pattern.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr110591.c: New test.
* gcc.target/i386/pr110591-2.c: New test.
Diffstat (limited to 'gcc/tree-ssa-phiopt.cc')
0 files changed, 0 insertions, 0 deletions