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authorPan Li <pan2.li@intel.com>2024-08-17 19:27:11 +0800
committerPan Li <pan2.li@intel.com>2024-08-18 09:21:59 +0800
commit8d0efcf5581abf2560701f4143a0c2ccb261d1f7 (patch)
tree90b90dc426e34c58c6a3b297ebfd49366bf40ce6 /gcc/tree-ssa-phiopt.cc
parent6fbdbad97d451cc220a5654c8b97b9911485ef4a (diff)
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RISC-V: Add testcases for unsigned scalar .SAT_TRUNC form 3
This patch would like to add test cases for the unsigned scalar .SAT_TRUNC form 3. Aka: Form 3: #define DEF_SAT_U_TRUC_FMT_3(NT, WT) \ NT __attribute__((noinline)) \ sat_u_truc_##WT##_to_##NT##_fmt_3 (WT x) \ { \ WT max = (WT)(NT)-1; \ return x <= max ? (NT)x : (NT) max; \ } DEF_SAT_U_TRUC_FMT_3 (uint32_t, uint64_t) The below test is passed for this patch. * The rv64gcv regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Add test helper macros. * gcc.target/riscv/sat_u_trunc-13.c: New test. * gcc.target/riscv/sat_u_trunc-14.c: New test. * gcc.target/riscv/sat_u_trunc-15.c: New test. * gcc.target/riscv/sat_u_trunc-run-13.c: New test. * gcc.target/riscv/sat_u_trunc-run-14.c: New test. * gcc.target/riscv/sat_u_trunc-run-15.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
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