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authorPan Li <pan2.li@intel.com>2024-08-17 18:04:00 +0800
committerPan Li <pan2.li@intel.com>2024-08-18 09:21:49 +0800
commit6fbdbad97d451cc220a5654c8b97b9911485ef4a (patch)
tree8c48a2df18fe795f57efd32219087b00e304e71e /gcc/tree-ssa-phiopt.cc
parent0555f6512991fc147b36f284c7a175c2b56de21b (diff)
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RISC-V: Add testcases for unsigned scalar .SAT_TRUNC form 2
This patch would like to add test cases for the unsigned scalar .SAT_TRUNC form 2. Aka: Form 2: #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ NT __attribute__((noinline)) \ sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ { \ WT max = (WT)(NT)-1; \ return x > max ? (NT) max : (NT)x; \ } DEF_SAT_U_TRUC_FMT_2 (uint32_t, uint64_t) The below test is passed for this patch. * The rv64gcv regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Add test helper macros. * gcc.target/riscv/sat_u_trunc-7.c: New test. * gcc.target/riscv/sat_u_trunc-8.c: New test. * gcc.target/riscv/sat_u_trunc-9.c: New test. * gcc.target/riscv/sat_u_trunc-run-7.c: New test. * gcc.target/riscv/sat_u_trunc-run-8.c: New test. * gcc.target/riscv/sat_u_trunc-run-9.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
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