diff options
author | Georg-Johann Lay <avr@gjlay.de> | 2024-08-18 18:26:16 +0200 |
---|---|---|
committer | Georg-Johann Lay <avr@gjlay.de> | 2024-08-18 18:26:16 +0200 |
commit | 1ed1dd521b8104dd76d010aaf78f130b1832864e (patch) | |
tree | d019a28d934f431fb25bab986f8d05db27ecc482 /gcc/tree-ssa-phiopt.cc | |
parent | 22acd3c4d18dbd4d4d39d7770145fe3ec36073f6 (diff) | |
download | gcc-1ed1dd521b8104dd76d010aaf78f130b1832864e.zip gcc-1ed1dd521b8104dd76d010aaf78f130b1832864e.tar.gz gcc-1ed1dd521b8104dd76d010aaf78f130b1832864e.tar.bz2 |
AVR: Tweak 16-bit addition with const that didn't get a LD_REGS register.
The 16-bit additions like addhi3 have two forms: One with a scratch:QI
and one without, where the latter is required because reload cannot
deal with a scratch when spill code pops a 16-bit addition.
Passes like combine and fwprop1 may come up with the non-scratch version,
which is sub-optimal in the case when the addition is performed in a
NO_LD_REGS register because the operands will be spilled to LD_REGS.
Having a scratch:QI at disposal can lead to better code with less spills.
gcc/
* config/avr/avr.md (*add<mode>3_split) [!reload_completed]:
Add a scratch:QI to 16-bit additions with constant.
Diffstat (limited to 'gcc/tree-ssa-phiopt.cc')
0 files changed, 0 insertions, 0 deletions