aarch64: Some tweaks to the early-ra pass

early-ra's likely_operand_match_p didn't handle relaxed and special
memory constraints, which meant that the pass wasn't able to match
LD1RQ instructions to their constraints, and so backed out of
trying to allocate.  This patch fixes that by switching the sense
of the match: does the rtx seem appropriate for the constraint?,
rather than: does the constraint seem appropriate for the rtx?

Also, I came across a case that needed more general equivalence
detection.  Previously we would only record equivalences after
the last definition of the source register, but it's worth trying
to handle cases where the destination register's live range is
restricted to a block, and the next definition of the source
occurs only after the end of the destination register's live range.

The patch also fixes a cut-&-pasto that Alex noticed (thanks).

gcc/
	* config/aarch64/aarch64-early-ra.cc (allocno_info::chain_next):
	Put into an enum with...
	(allocno_info::last_def_point):	...new member variable.
	(allocno_info::m_current_bb_point): New member variable.
	(likely_operand_match_p): Switch based on get_constraint_type,
	rather than based on rtx code.  Handle relaxed and special memory
	constraints.
	(early_ra::record_copy): Allow the source of an equivalence to be
	assigned to more than once.
	(early_ra::record_allocno_use): Invalidate any previous equivalence.
	Initialize last_def_point.
	(early_ra::record_allocno_def): Set last_def_point.
	(early_ra::valid_equivalence_p): New function, split out from...
	(early_ra::record_copy): ...here.  Use last_def_point to handle
	source registers that have a later definition.
	(make_pass_aarch64_early_ra): Fix comment.

gcc/testsuite/
	* gcc.target/aarch64/sme/strided_2.c: New test.

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