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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-04-15 18:20:01 +0000 |
|---|---|---|
| committer | William Schmidt <wschmidt@gcc.gnu.org> | 2014-04-15 18:20:01 +0000 |
| commit | dfe449d152247bdef54c59b48de03abc0a4aa228 (patch) | |
| tree | a1a3df086944cc85f1140e5de744f5ceabb77fae /gcc/tree-ssa-operands.c | |
| parent | 25dce5c6fb72b00a31245938fb69fd198e1fe31f (diff) | |
| download | gcc-dfe449d152247bdef54c59b48de03abc0a4aa228.zip gcc-dfe449d152247bdef54c59b48de03abc0a4aa228.tar.gz gcc-dfe449d152247bdef54c59b48de03abc0a4aa228.tar.bz2 | |
re PR target/60839 (PowerPC: internal compiler error: in extract_insn, at recog.c:2154)
2014-04-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/60839
Revert following patch
2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
software floating point or no floating point registers, do not
allow any type in the FPRs. Eliminate a test for SPE SIMD types
in GPRs that occurs after we tested for GPRs that would never be
true.
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,
specifically allow DDmode, since that does not use the SPE SIMD
instructions.
From-SVN: r209425
Diffstat (limited to 'gcc/tree-ssa-operands.c')
0 files changed, 0 insertions, 0 deletions